Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.

At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.

Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.

Who you'll work with

The Routing team who work on the core logic of the network that decides on how packets traverse the network in the most optimal and resilient manner.

Arista Networks is looking for Graduate Engineers interested in learning world leading product development in C/C++, Go, Java, and other languages. Join us at Arista Networks advancing the Software Defined Networking (SDN) revolution. 

What You’ll Do 

• Writing Linux user space and kernel code to allow 32-bit drivers to DMA 64-bit virtual memory spaces using both Intel and AMD IOMMU controller.
• Working on the hardware/software boundary for chips and the kernel. Where an x86 chip might have tens of registers, you will routinely work on ASICs with thousands of registers, tables, and special TCAM memories. You will program networking chips to provide latency analysis and keep accurate counts of events happening billions of times per second. You will write Python to bootstrap new hardware. You will build software agents that mediate and translate between the requirements of switching ASICs, high capacity custom FPGAs, media adapters, and PCIe bridges. You might tune lasers and measure and correct error rates measured in parts per billion. 
• Implementing communications protocols between routers and switches at layer 2 (such as LLDP, 802.1x, BFD, etc), and layer 3 (such as BGP, OSPF, ISIS).
• Updating the forwarding state of the hardware, using platform-independent abstractions.
• Reconciling the linux kernel routing model with the switch's forwarding state.
• Implementing a policy language used for filtering and manipulating routing data received and advertised to peers
• Accessing ASIC registers over SPI bus, SMbus, PCIe and I2C, to implement high resolution timers (sub-100ns accuracy) and read ASIC hardware specifications to gather near-real-time information on large numbers of packet flows and to generate network congestion statistics.
• Developing configuration management services using Go and Python to support YANG, OpenConfig, NETCONF and RESTCONF over gRPC, ssh and ssl for standardised switch configuration, combined with tools such as git, gerrit, Jenkins, Slack and Trello.
• Developing routing protocol agents (for BGP, OSPF, ISIS) in C/C++ within a Fedora Linux embedded environment. Coding of fault-tolerant, concurrent agents capable of handling the demands of future data centres where high performance and high availability are basic requirements. Fully automated, developer owned, Python based, continuous test harness with 100s of devices under test at any one moment.

Any of the following:- C, C++, Java, Python, Go, react.js, redux.js, node.js Networking, Linux Embedded Systems, Algorithms, Programming, Software Development.

All your information will be kept confidential according to EEO guidelines.