The future. It’s on you. You & Western Digital.

We’ve been storing the world’s data for more than 50 years. Once, it was the most important thing we could do for data. Now we’re helping the world capture, preserve, access and transform data in a way only we can.

The most game-changing companies, consumers, professionals, and governments come to us for the technologies and solutions they need to capture, preserve, access, and transform their data.

But we can’t do it alone. Today’s exceptional data challenges require your exceptional skills. It’s You & Us. Together, we’re the next big thing in data. 
 
Western Digital® data-centric solutions are found under the G-Technology™, HGST, SanDisk®, Tegile™, Upthere™, and WD® brands.

1. The ASIC Packaging Engineer is a part of the team of IC package development and supports the team development activities for specific or multidisciplinary areas – ASIC Floor planning, Bump structure and Substrate stackup, Substrate routing feasibility, feasibility of Mechanical Structure; Material compatibility; Thermal solutions; package Qual process,
2. Coordination with SanDisk worldwide NAND and Controller design teams (Israel, India, USA) and multiple Product Development groups within the company.
3. Coordinates with factories worldwide on the Eng Samples deliveries, Package Qualification plan. Support of manufacturing rump and introduction of new assembly processes. Manages assembly yield improvement and package cost reduction programs. 
4. Represents Package Engineering Org in cross-functional teams and ensures that packages are characterized, qualified and transferred in production in a timely manner while meeting all electrical, performance, reliability and quality requirements.

1. This position requires a candidate with BE / MS degree in in Mechanical, Material or Electrical Engineering (VLSI) or equivalent with 4-6 years of relevant work experience in Microelectronics, PCB or IC packaging assembly industry.

2. Knowledge of Cadence APD tool is a must and should have handled Package design for both wirebond and flip chip based packages. Knowledge of materials / mechanical aspects of packaging a plus.

3. Knowledge of Package signal integrity and power integrity principles is required. Knowledge of EMI, HFSS, HSPICE is a plus.

4. Practical skill in AutoCAD, Cadenc Finite Element Analysis, Design of Experiments, statistical techniques and package failure analysis techniques desirable.

5. Ability to daily multi-tasking in different projects, manage and meet tight deadlines of packaging deliverables as a part of multidisciplinary team as well as excellent communication and interpersonal skills required.

Because Western Digital thrives on the power of diversity and is committed to an inclusive environment where every individual can thrive through a sense of belonging, respect, and contribution, we are committed to giving every qualified applicant and employee an equal opportunity.  Western Digital does not discriminate against any applicant or employee based on their protected class status and complies with all federal and state laws against discrimination, harassment, and retaliation, as well as the laws and regulations set forth in the "Equal Employment Opportunity is the Law" poster.